From the point of view of the precision of the test operation and the number of employees, wafer testing (CP) belongs to the "wafer level" process, thousands or even tens of thousands of bare chips are highly integrated on a wafer, and the requirements for the cleanliness level of the test operation. Read More

Why is the SRAM capacity in the CPU relatively small while the Flash capacity is relatively large?1. Technical characteristics and application requirementsWe need to understand the basic features of both SRAM and Flash storage technologies and their application requirements in the CPU.1.1 SRAM (Stat Read More

Wafer-level packaging (WLP) is a technology for packaging directly on the Wafer. Wafer-level packaging compared with traditional packaging technology, the use of semiconductor manufacturing processes. Unlike traditional packaging, wafer-level packaging is the process of packaging the entire wafer before cutting the wafer into a single chip. Read More

Photoresist is mainly composed of resin, photoinitiator, solvent and additive. Therefore, in the lithography process, continuous baking is required to remove the solvent. Gluing can be understood as Ashing or Descum. The principle is to pass oxygen into the reaction chamber, isoionize it, and react with the photoresist to produce water vapor, carbon dioxide and other gases. Read More

At Computex, Mediatek announced that it has joined the Arm Total Design Alliance (Arm Total Design Alliance) and received a NeoversecSS license from Arm.
The license is Arm's solution offering for data centers, edge computing and high performance computing (HPC).Mediatek obtained the authorization, which means that the company officially entered the cloud server field after AI mobile phones and automotive electronics, and opened a new growth area.
After entering the cloud server market, Mediatek may become a partner of NVIDIA and participate in the design of the next generation Rubin architecture.
In addition, in terms of AI PC, Morgan predicted that the WoA PC chip developed by Mediatek and NVDA will be unveiled at CES in January next year. Read More

By integrating Bipolar, CMOS, and DMOS technologies on a single chip, the BCD process offers versatile integration, performance optimization, high reliability, cost-effectiveness, and broad application prospects to meet the increasingly complex and high-performance requirements of modern electronic systems. Read More